Functional Verification of Programmable Embedded Architectures
Mishra, Prabhat.
Functional Verification of Programmable Embedded Architectures A Top-Down Approach / [electronic resource] : by Prabhat Mishra, Nikil D. Dutt. - XIX, 180 p. online resource.
to Functional Verification -- Architecture Specification -- Architecture Specification -- Validation of Specification -- Top-Down Validation -- Executable Model Generation -- Design Validation -- Functional Test Generation -- Future Directions -- Conclusions.
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect’s knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric. Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems.
9780387263991
10.1007/b137514 doi
Engineering.
Computer science.
Software engineering.
Computer system performance.
Computer aided design.
Systems engineering.
Engineering.
Circuits and Systems.
Processor Architectures.
Special Purpose and Application-Based Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
System Performance and Evaluation.
Electronic and Computer Engineering.
TK7888.4
621.3815
Functional Verification of Programmable Embedded Architectures A Top-Down Approach / [electronic resource] : by Prabhat Mishra, Nikil D. Dutt. - XIX, 180 p. online resource.
to Functional Verification -- Architecture Specification -- Architecture Specification -- Validation of Specification -- Top-Down Validation -- Executable Model Generation -- Design Validation -- Functional Test Generation -- Future Directions -- Conclusions.
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect’s knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric. Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems.
9780387263991
10.1007/b137514 doi
Engineering.
Computer science.
Software engineering.
Computer system performance.
Computer aided design.
Systems engineering.
Engineering.
Circuits and Systems.
Processor Architectures.
Special Purpose and Application-Based Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
System Performance and Evaluation.
Electronic and Computer Engineering.
TK7888.4
621.3815