FPGA Implementations of Neural Networks (Record no. 14427)

MARC details
000 -LEADER
fixed length control field 03734nam a22005175i 4500
001 - CONTROL NUMBER
control field 978-0-387-28487-3
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20170628033255.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 100301s2006 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780387284873
-- 978-0-387-28487-3
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/0-387-28487-7
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7888.4
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Omondi, Amos R.
Relator term editor.
245 10 - TITLE STATEMENT
Title FPGA Implementations of Neural Networks
Medium [electronic resource] /
Statement of responsibility, etc edited by Amos R. Omondi, Jagath C. Rajapakse.
264 #1 -
-- Boston, MA :
-- Springer US,
-- 2006.
300 ## - PHYSICAL DESCRIPTION
Extent XII, 360 p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
338 ## -
-- online resource
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-- text file
-- PDF
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505 0# - FORMATTED CONTENTS NOTE
Formatted contents note FPGA Neurocomputers -- On the Arithmetic Precision for Implementing Back-Propagation Networks on FPGA: A Case Study -- FPNA: Concepts and Properties -- FPNA: Applications and Implementations -- Back-Propagation Algorithm Achieving 5 Gops on the Virtex-E -- FPGA Implementation of Very Large Associative Memories -- FPGA Implementations of Neocognitrons -- Self Organizing Feature Map for Color Quantization on FPGA -- Implementation of Self-Organizing Feature Maps in Reconfigurable Hardware -- FPGA Implementation of a Fully and Partially Connected MLP -- FPGA Implementation of Non-Linear Predictors -- The REMAP Reconfigurable Architecture: A Retrospective.
520 ## - SUMMARY, ETC.
Summary, etc During the 1980s and early 1990s there was signi?cant work in the design and implementation of hardware neurocomputers. Nevertheless, most of these efforts may be judged to have been unsuccessful: at no time have have ha- ware neurocomputers been in wide use. This lack of success may be largely attributed to the fact that earlier work was almost entirely aimed at developing custom neurocomputers, based on ASIC technology, but for such niche - eas this technology was never suf?ciently developed or competitive enough to justify large-scale adoption. On the other hand, gate-arrays of the period m- tioned were never large enough nor fast enough for serious arti?cial-neur- network (ANN) applications. But technology has now improved: the capacity and performance of current FPGAs are such that they present a much more realistic alternative. Consequently neurocomputers based on FPGAs are now a much more practical proposition than they have been in the past. This book summarizes some work towards this goal and consists of 12 papers that were selected, after review, from a number of submissions. The book is nominally divided into three parts: Chapters 1 through 4 deal with foundational issues; Chapters 5 through 11 deal with a variety of implementations; and Chapter 12 looks at the lessons learned from a large-scale project and also reconsiders design issues in light of current and future technology.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Software engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Science, general.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering Design.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Special Purpose and Application-Based Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronic and Computer Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Processor Architectures.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Rajapakse, Jagath C.
Relator term editor.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9780387284859
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="http://dx.doi.org/10.1007/0-387-28487-7">http://dx.doi.org/10.1007/0-387-28487-7</a>
912 ## -
-- ZDB-2-ENG
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Home library Current library Date acquired Source of acquisition Total Checkouts Barcode Date last seen Price effective from Koha item type
    Dewey Decimal Classification     Central Library Central Library 28/06/2017 Springer EBook   E-37606 28/06/2017 28/06/2017 E-Book

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