MARC details
000 -LEADER |
fixed length control field |
03809nam a22005175i 4500 |
001 - CONTROL NUMBER |
control field |
978-1-4020-5897-4 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
DE-He213 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20170628033506.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
100301s2007 ne | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9781402058974 |
-- |
978-1-4020-5897-4 |
024 7# - OTHER STANDARD IDENTIFIER |
Standard number or code |
10.1007/978-1-4020-5897-4 |
Source of number or code |
doi |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7888.4 |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
bicssc |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TEC008010 |
Source |
bisacsh |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Verma, Manish. |
Relator term |
author. |
245 10 - TITLE STATEMENT |
Title |
Advanced Memory Optimization Techniques for Low-Power Embedded Processors |
Medium |
[electronic resource] / |
Statement of responsibility, etc |
by Manish Verma, Peter Marwedel. |
264 #1 - |
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Dordrecht : |
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Springer Netherlands, |
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2007. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XII, 188 p. |
Other physical details |
online resource. |
336 ## - |
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text |
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txt |
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rdacontent |
337 ## - |
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computer |
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c |
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rdamedia |
338 ## - |
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online resource |
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cr |
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rdacarrier |
347 ## - |
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text file |
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PDF |
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rda |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Related Work -- Memory Aware Compilation and Simulation Framework -- Non-Overlayed Scratchpad Allocation Approaches for Main/Scratchpad Memory Hierarchy -- Non-Overlayed Scratchpad Allocation Approaches for Main/Scratchpad + Cache Memory Hierarchy -- Scratchpad Overlay Approaches for Main/Scratchpad Memory Hierarchy -- Data Partitioning and Loop Nest Splitting -- Scratchpad Sharing Strategies for Multiprocess Applications -- Conclusions and Future Directions. |
520 ## - SUMMARY, ETC. |
Summary, etc |
The design of embedded systems warrants a new perspective because of the following two reasons: Firstly, slow and energy inefficient memory hierarchies have already become the bottleneck of the embedded systems. It is documented in the literature as the memory wall problem. Secondly, the software running on the contemporary embedded devices is becoming increasingly complex. It is also well understood that no silver bullet exists to solve the memory wall problem. Therefore, this book explores a collaborative approach by proposing novel memory hierarchies and software optimization techniques for the optimal utilization of these memory hierarchies. Linking memory architecture design with memory-architecture aware compilation results in fast, energy-efficient and timing predictable memory accesses. The evaluation of the optimization techniques using real-life benchmarks for a single processor system, a multiprocessor system-on-chip (SoC) and for a digital signal processor system, reports significant reductions in the energy consumption and performance improvement of these systems. The book presents a wide range of optimizations, progressively increasing in the complexity of analysis and of memory hierarchies. The final chapter covers optimization techniques for applications consisting of multiple processes found in most modern embedded devices. Advanced Memory Optimization Techniques for Low Power Embedded Processors is designed for researchers, complier writers and embedded system designers / architects who wish to optimize the energy and performance characteristics of the memory subsystem. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Engineering. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Memory management (Computer science). |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Software engineering. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Computer system performance. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Computer science. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Systems engineering. |
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Engineering. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Circuits and Systems. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Programming Languages, Compilers, Interpreters. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Memory Structures. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Special Purpose and Application-Based Systems. |
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
System Performance and Evaluation. |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Marwedel, Peter. |
Relator term |
author. |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer eBooks |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Display text |
Printed edition: |
International Standard Book Number |
9781402058967 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Uniform Resource Identifier |
<a href="http://dx.doi.org/10.1007/978-1-4020-5897-4">http://dx.doi.org/10.1007/978-1-4020-5897-4</a> |
912 ## - |
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ZDB-2-ENG |