MARC details
| 000 -LEADER |
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03367nam a22004575i 4500 |
| 001 - CONTROL NUMBER |
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| control field |
978-1-4020-8652-6 |
| 003 - CONTROL NUMBER IDENTIFIER |
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| control field |
DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20170628033522.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
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| fixed length control field |
cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
100301s2008 ne | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9781402086526 |
| -- |
978-1-4020-8652-6 |
| 024 7# - OTHER STANDARD IDENTIFIER |
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| Standard number or code |
10.1007/978-1-4020-8652-6 |
| Source of number or code |
doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
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| Classification number |
TK7888.4 |
| 072 #7 - SUBJECT CATEGORY CODE |
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| Subject category code |
TJFC |
| Source |
bicssc |
| 072 #7 - SUBJECT CATEGORY CODE |
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| Subject category code |
TEC008010 |
| Source |
bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
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| Classification number |
621.3815 |
| Edition number |
23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
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| Personal name |
Wieferink, Andreas. |
| Relator term |
author. |
| 245 10 - TITLE STATEMENT |
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| Title |
Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms |
| Medium |
[electronic resource] / |
| Statement of responsibility, etc |
by Andreas Wieferink, Heinrich Meyr, Rainer Leupers. |
| 264 #1 - |
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Dordrecht : |
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Springer Netherlands, |
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2008. |
| 300 ## - PHYSICAL DESCRIPTION |
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| Extent |
XIV, 162 p. |
| Other physical details |
online resource. |
| 336 ## - |
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text |
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txt |
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rdacontent |
| 337 ## - |
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computer |
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c |
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rdamedia |
| 338 ## - |
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online resource |
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cr |
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rdacarrier |
| 347 ## - |
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text file |
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PDF |
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rda |
| 505 0# - FORMATTED CONTENTS NOTE |
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| Formatted contents note |
SOC Design Methodologies -- Communication Modeling -- Processor Modeling -- Processor System Integration -- Successive Top-Down Refinement Flow -- Automatic Retargetability -- Debugging and Profiling -- Case Study -- Summary. |
| 520 ## - SUMMARY, ETC. |
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| Summary, etc |
The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to the respective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements. However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration is only possible if accurate module simulators are generated automatically based on abstract specifications. As a matter of fact, CoWare’s BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores. In Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, such originally independent approaches are combined in order to enable the development of highly optimized programmable platforms. The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design, communication modeling, and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Systems engineering. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Special Purpose and Application-Based Systems. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
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| Personal name |
Meyr, Heinrich. |
| Relator term |
author. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Leupers, Rainer. |
| Relator term |
author. |
| 710 2# - ADDED ENTRY--CORPORATE NAME |
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| Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY |
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| Title |
Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
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| Display text |
Printed edition: |
| International Standard Book Number |
9781402085741 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
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| Uniform Resource Identifier |
<a href="http://dx.doi.org/10.1007/978-1-4020-8652-6">http://dx.doi.org/10.1007/978-1-4020-8652-6</a> |
| 912 ## - |
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ZDB-2-ENG |
