MARC details
| 000 -LEADER |
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| fixed length control field |
03038nam a22004815i 4500 |
| 001 - CONTROL NUMBER |
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| control field |
978-1-4614-8881-1 |
| 003 - CONTROL NUMBER IDENTIFIER |
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| control field |
DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20170628033823.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
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| fixed length control field |
cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
131022s2014 xxu| s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9781461488811 |
| -- |
978-1-4614-8881-1 |
| 024 7# - OTHER STANDARD IDENTIFIER |
|---|
| Standard number or code |
10.1007/978-1-4614-8881-1 |
| Source of number or code |
doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7888.4 |
| 072 #7 - SUBJECT CATEGORY CODE |
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| Subject category code |
TJFC |
| Source |
bicssc |
| 072 #7 - SUBJECT CATEGORY CODE |
|---|
| Subject category code |
TEC008010 |
| Source |
bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.3815 |
| Edition number |
23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Mohammad, Baker. |
| Relator term |
author. |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Embedded Memory Design for Multi-Core and Systems on Chip |
| Medium |
[electronic resource] / |
| Statement of responsibility, etc |
by Baker Mohammad. |
| 264 #1 - |
|---|
| -- |
New York, NY : |
| -- |
Springer New York : |
| -- |
Imprint: Springer, |
| -- |
2014. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
XIII, 95 p. 63 illus., 37 illus. in color. |
| Other physical details |
online resource. |
| 336 ## - |
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| -- |
text |
| -- |
txt |
| -- |
rdacontent |
| 337 ## - |
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| -- |
computer |
| -- |
c |
| -- |
rdamedia |
| 338 ## - |
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| -- |
online resource |
| -- |
cr |
| -- |
rdacarrier |
| 347 ## - |
|---|
| -- |
text file |
| -- |
PDF |
| -- |
rda |
| 490 1# - SERIES STATEMENT |
|---|
| Series statement |
Analog Circuits and Signal Processing, |
| International Standard Serial Number |
1872-082X ; |
| Volume number/sequential designation |
116 |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Introduction -- Cache Architecture and Main Blocks -- Embedded Memory Hierarchy -- SRAM Memory Operation and Yield -- Low Power and High Yield SRAM Memory -- Leakage Reduction -- Embedded Memory Verification -- Embedded Memory Design Validation and Design For Test -- Emerging Memory Technology Opportunities and Challenges. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory. · Provides a comprehensive overview of embedded memory design and associated challenges and choices; · Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; · Includes detailed discussion of memory hierarchy and its impact on energy and performance; · Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Electronics. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Systems engineering. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Electronics and Microelectronics, Instrumentation. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Processor Architectures. |
| 710 2# - ADDED ENTRY--CORPORATE NAME |
|---|
| Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY |
|---|
| Title |
Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
|---|
| Display text |
Printed edition: |
| International Standard Book Number |
9781461488804 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
|---|
| Uniform title |
Analog Circuits and Signal Processing, |
| -- |
1872-082X ; |
| Volume number/sequential designation |
116 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
<a href="http://dx.doi.org/10.1007/978-1-4614-8881-1">http://dx.doi.org/10.1007/978-1-4614-8881-1</a> |
| 912 ## - |
|---|
| -- |
ZDB-2-ENG |
