MARC details
| 000 -LEADER |
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| fixed length control field |
03249nam a22004695i 4500 |
| 001 - CONTROL NUMBER |
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| control field |
978-3-319-00681-9 |
| 003 - CONTROL NUMBER IDENTIFIER |
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| control field |
DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20170628034026.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
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| fixed length control field |
cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
130918s2014 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9783319006819 |
| -- |
978-3-319-00681-9 |
| 024 7# - OTHER STANDARD IDENTIFIER |
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| Standard number or code |
10.1007/978-3-319-00681-9 |
| Source of number or code |
doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
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| Classification number |
TK7888.4 |
| 072 #7 - SUBJECT CATEGORY CODE |
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| Subject category code |
TJFC |
| Source |
bicssc |
| 072 #7 - SUBJECT CATEGORY CODE |
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| Subject category code |
TEC008010 |
| Source |
bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
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| Classification number |
621.3815 |
| Edition number |
23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
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| Personal name |
Sun, Guangyu. |
| Relator term |
author. |
| 245 10 - TITLE STATEMENT |
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| Title |
Exploring Memory Hierarchy Design with Emerging Memory Technologies |
| Medium |
[electronic resource] / |
| Statement of responsibility, etc |
by Guangyu Sun. |
| 264 #1 - |
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| -- |
Cham : |
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Springer International Publishing : |
| -- |
Imprint: Springer, |
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2014. |
| 300 ## - PHYSICAL DESCRIPTION |
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| Extent |
VII, 122 p. 71 illus., 57 illus. in color. |
| Other physical details |
online resource. |
| 336 ## - |
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| -- |
text |
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txt |
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rdacontent |
| 337 ## - |
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computer |
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c |
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rdamedia |
| 338 ## - |
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| -- |
online resource |
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cr |
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rdacarrier |
| 347 ## - |
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| -- |
text file |
| -- |
PDF |
| -- |
rda |
| 490 1# - SERIES STATEMENT |
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| Series statement |
Lecture Notes in Electrical Engineering, |
| International Standard Serial Number |
1876-1100 ; |
| Volume number/sequential designation |
267 |
| 505 0# - FORMATTED CONTENTS NOTE |
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| Formatted contents note |
Introduction -- Replacing Different Levels of the Memory Hierarchy with NVMs -- Moguls: a Model to Explore the Memory Hierarchy for Throughput Computing -- Exploring the Vulnerability of CMPs to Soft Errors with 3D Stacked Non-Volatile Memory. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
This book equips readers with tools for computer architecture of high performance, low power, and high reliability memory hierarchy in computer systems based on emerging memory technologies, such as STTRAM, PCM, FBDRAM, etc. The techniques described offer advantages of high density, near-zero static power, and immunity to soft errors, which have the potential of overcoming the “memory wall.” The authors discuss memory design from various perspectives: emerging memory technologies are employed in the memory hierarchy with novel architecture modification; hybrid memory structure is introduced to leverage advantages from multiple memory technologies; an analytical model named “Moguls” is introduced to explore quantitatively the optimization design of a memory hierarchy; finally, the vulnerability of the CMPs to radiation-based soft errors is improved by replacing different levels of on-chip memory with STT-RAMs. · Provides a holistic study of using emerging memory technologies in different levels of the memory hierarchy; · Equips readers with techniques for memory design with improved performance, energy consumption, and reliability; · Includes coverage of all memory levels, ranging from cache to storage; · Explains how to choose the proper memory technologies in different levels of the memory hierarchy. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Systems engineering. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical term or geographic name as entry element |
Processor Architectures. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Semiconductors. |
| 710 2# - ADDED ENTRY--CORPORATE NAME |
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| Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY |
|---|
| Title |
Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
|---|
| Display text |
Printed edition: |
| International Standard Book Number |
9783319006802 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
|---|
| Uniform title |
Lecture Notes in Electrical Engineering, |
| -- |
1876-1100 ; |
| Volume number/sequential designation |
267 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
<a href="http://dx.doi.org/10.1007/978-3-319-00681-9">http://dx.doi.org/10.1007/978-3-319-00681-9</a> |
| 912 ## - |
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| -- |
ZDB-2-ENG |
