Run-time Adaptation for Reconfigurable Embedded Processors [electronic resource] / by Lars Bauer, Jörg Henkel.
Material type:![Text](/opac-tmpl/lib/famfamfam/BK.png)
- text
- computer
- online resource
- 9781441974129
- 621.3815 23
- TK7888.4
Item type | Current library | Call number | Status | Date due | Barcode | |
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Central Library | Available | E-39033 |
Introduction -- Background and related work -- Modular Special Instructions -- The RISPP Run-time System -- RISPP Architecture Details -- Benchmarks and Comparisons -- Conclusion and outlook.
Run-time Adaptation for Reconfigurable Embedded Processors by: Lars Bauer Jörg Henkel Embedded processors are the heart of embedded systems. Reconfigurable embedded processors comprise an extended instruction set that is implemented using a reconfigurable fabric (similar to a field-programmable gate array, FPGA). This book presents novel concepts, strategies, and implementations to increase the run-time adaptivity of reconfigurable embedded processors. Concepts and techniques are presented in an accessible, yet rigorous context. A complex, realistic H.264 video encoder application with a high demand for adaptivity is presented and used as an example for motivation throughout the book. A novel, run-time system is demonstrated to exploit the potential for adaptivity and particular approaches/algorithms are presented to implement it. •Presents a new approach to increase the adaptivity of embedded processors; •Describes a novel approach to increasing the adaptivity for reconfigurable processors, explained in a very visual/imaginable manner, as well a very precise/formal manner; •Presents a complex, realistic H.264 video encoder application with a high demand for adaptivity and uses that example for motivation/in-depth evaluation throughout the book; •Describes a novel run-time system that exploits the potential for adaptivity and particular approaches/algorithms to implement it.
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