High-performance Packet Switching Architectures [electronic resource] / edited by Itamar Elhanany, Mounir Hamdi.

Architectures of Internet Switches and Routers -- Theoretical Performance of Input-queued Switches using Lyapunov Methodology -- Adaptive Batch Scheduling for Packet Switching with Delays -- Geometry of Packet Switching: Maximal Throughput Cone Scheduling Algorithms -- Fabric on a Chip: A Memory-management Perspective -- Packet Switch with Internally Buffered Crossbars -- Dual Scheduling Algorithm in a Generalized Switch: Asymptotic Optimality and Throughput Optimality -- The Combined Input and Crosspoint Queued Switch -- Time-Space Label Switching Protocol (TSL-SP) -- Hybrid Open Hash Tables for Network Processors.

Internet traffic is increasing at a rate of at least 200% per year. The world’s largest Internet Service Provider has recently stated that it expects traffic capacity on its regional trunks to grow to a 1-10 petabit range over the next four to five years. Wavelength division multiplexing (WDM), long-haul fiber-optic links and high-capacity all-optical circuit switches are now being employed at the Internet core to process such massive traffic, consequently creating a demand for novel high-performance packet switching technologies (IP routers, ATM switches, and Ethernet Switches) which feed the optical core. Over the last ten years, tremendous technological advances have taken place in order to achieve these objectives. High-performance Packet Switching Architectures is the first book to cover these advances in a comprehensive one-volume survey. The book’s editors have brought together contributions from leading researchers in industry and universities, yielding an integrated coverage of the state-of-the-art in packet-switching technologies. A mix of theoretical and practical material allows the book to act an essential reference for researchers in academia as well as industrial engineers.