Computer Performance Evaluation and Benchmarking [electronic resource] : SPEC Benchmark Workshop 2009, Austin, TX, USA, January 25, 2009. Proceedings / edited by David Kaeli, Kai Sachs.

Benchmark Suites -- SPECrate2006: Alternatives Considered, Lessons Learned -- SPECjvm2008 Performance Characterization -- CPU Benchmarking -- Performance Characterization of Itanium® 2-Based Montecito Processor -- A Tale of Two Processors: Revisiting the RISC-CISC Debate -- Investigating Cache Parameters of x86 Family Processors -- Power/Thermal Benchmarking -- The Next Frontier for Power/Performance Benchmarking: Energy Efficiency of Storage Subsystems -- Thermal Design Space Exploration of 3D Die Stacked Multi-core Processors Using Geospatial-Based Predictive Models -- Modeling and Sampling Techniques -- Generation, Validation and Analysis of SPEC CPU2006 Simulation Points Based on Branch, Memory and TLB Characteristics -- A Note on the Effects of Service Time Distribution in the M/G/1 Queue.

This book constitutes the proceedings of the SPEC Benchmark Workshop 2009 held in Austin, Texas, USA on January 25th, 2009. The 9 papers presented were carefully selected and reviewed for inclusion in the book. The result is a collection of high-quality papers discussing current issues in the area of benchmarking research and technology. The topics covered are: benchmark suites, CPU benchmarking, power/thermal benchmarking, and modeling and sampling techniques.