TY  - BOOK
AU  - Chang,Kai-hui
AU  - Markov,Igor L.
AU  - Bertacco,Valeria
ED  - SpringerLink (Online service)
TI  - Functional Design Errors in Digital Circuits: Diagnosis, Correction and Repair 
T2  - Lecture Notes in Electrical Engineering,
SN  - 9781402093654
AV  - TK7888.4 
U1  - 621.3815 23
PY  - 2009///
CY  - Dordrecht
PB  - Springer Netherlands
KW  - Engineering
KW  - Logic design
KW  - Computer aided design
KW  - Systems engineering
KW  - Circuits and Systems
KW  - Computer-Aided Engineering (CAD, CAE) and Design
KW  - Logic Design
N1  - Background and Prior Art -- Current Landscape in Design and Verification -- Finding Bugs and Repairing Circuits -- FogClear Methodologies and Theoretical Advances in Error Repair -- Circuit Design and Verification Methodologies -- Counterexample-Guided Error-Repair Framework -- Signature-Based Resynthesis Techniques -- Symmetry-Based Rewiring -- FogClear Components -- Bug Trace Minimization -- Functional Error Diagnosis and Correction -- Incremental Verification for Physical Synthesis -- Post-Silicon Debugging and Layout Repair -- Methodologies for Spare-Cell Insertion -- Conclusions
N2  - Due to the dramatic increase in design complexity, modern circuits are often produced with functional errors. While improvements in verification allow engineers to find more errors, fixing these errors remains a manual and challenging task. Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. In addition, Functional Design Errors in Digital Circuits Diagnosis describes a comprehensive evaluation of spare-cell insertion methods. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices
UR  - http://dx.doi.org/10.1007/978-1-4020-9365-4
ER  -