TY  - BOOK
AU  - Shafique,Muhammad
AU  - Henkel,Jörg
ED  - SpringerLink (Online service)
TI  - Hardware/Software Architectures for Low-Power Embedded Multimedia Systems
SN  - 9781441996923
AV  - TK7888.4 
U1  - 621.3815 23
PY  - 2011///
CY  - New York, NY
PB  - Springer New York, Imprint: Springer
KW  - Engineering
KW  - Computer science
KW  - Systems engineering
KW  - Circuits and Systems
KW  - Processor Architectures
KW  - Energy, general
N1  - Introduction -- Background and Related Work -- Adaptive Low-Power Architectures for Embedded Multimedia Systems -- Adaptive Low-Power Video Coding -- Adaptive Low-Power Reconfigurable Processor Architecture -- Power Measurement of the Reconfigurable Processors -- Benchmarks and Results -- Conclusion and Outlook -- Appendix A: A Multi-Level Rate Control -- Appendix B: Simulation Environment the H.264 Video Encoder Demonstration -- Appendix C: The CES Video Analyzer Tool
N2  - The extreme complexity/energy requirements and context-aware processing nature of multimedia applications stimulate the need for adaptive low-power embedded multimedia systems with high-performance. Run-time adaptivity is required to react to the run-time varying scenarios (e.g., quality and performance constraints, available energy, input data).  This book presents techniques for energy reduction in adaptive embedded multimedia systems, based on dynamically reconfigurable processors.  The approach described will enable designers to meet performance/area constraints, while minimizing video quality degradation, under various, run-time scenarios.  Emphasis is placed on implementing power/energy reduction at various abstraction levels. To enable this, novel techniques for adaptive energy management at both processor architecture and application architecture levels are presented, such that both hardware and software adapt together, minimizing overall energy consumption under unpredictable, design-/compile-time scenarios.   Introduces general concepts and requirements of embedded multimedia systems based on advanced video codecs, dynamically reconfigurable processors, and low-power techniques in reconfigurable computing; Describes novel techniques and concepts for providing adaptivity and energy reduction jointly at processor and application architecture levels; Provides techniques for enabling run-time configurability for quality vs. energy consumption tradeoff at the application level
UR  - http://dx.doi.org/10.1007/978-1-4419-9692-3
ER  -