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The Art of Hardware Architecture [electronic resource] : Design Methods and Techniques for Digital Circuits / by Mohit Arora.

By: Contributor(s): Material type: TextTextPublisher: New York, NY : Springer New York, 2012Edition: 1Description: XV, 221 p. online resourceContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9781461403975
Subject(s): Additional physical formats: Printed edition:: No titleDDC classification:
  • 621.3815 23
LOC classification:
  • TK7888.4
Online resources:
Contents:
The World of Metastability -- Clocks and Reset -- Handling Multiple Clocks -- Clock Dividers -- Low Power Design -- The Art of Pipelining -- Handling Endianess -- Debouncing Techniques -- Design Guidelines for EMC Performance -- References.
In: Springer eBooksSummary: This book highlights the complex issues, tasks and skills that must be mastered by an IP designer, in order to design an optimized and robust digital circuit to solve a problem. The techniques and methodologies described can serve as a bridge between specifications that are known to the designer and RTL code that is final outcome, reducing significantly the time it takes to convert initial ideas and concepts into right-first-time silicon.� Coverage focuses on real problems rather than theoretical concepts, with an emphasis on design techniques across various aspects of chip-design.�� Describes techniques to help IP designers get it right the first time, creating designs optimized in terms of power, area and performance; Focuses on practical aspects of chip design and minimizes theory; Covers chip design in a consistent way, starting with basics and gradually developing advanced concepts, such as electromagnetic compatibility (EMC) design techniques and low-power design techniques such as dynamic voltage and frequency scaling (DVFS). Mohit Arora is a Senior Systems Engineer with Freescale Semiconductor. Since joining Freescale in 2005, his responsibilities have included developing systems and architecture requirements and leading the development of VoIP-based SOCs, as well as generic microcontroller SOCs.  As a systems engineer, he has been involved in product definition and writing specification, working on MCU/MPU-based products for the mid-high-end industrial and consumer market space. Prior to joining Freescale, he worked for Agilent Technologies, ST Microelectronics and DCM Technologies as a design engineer and lead, focused on printing ASICs, USB2.0 PHY, PCI-Express, Infiniband and Serial ATA protocols.   He earned a Bachelor's degree in Electronics and Communication Engineering from Netaji Subhas Institute of Technology (NSIT), India in 2000, has more than 30 publications in international magazine and holds a patent on serial links.
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E-Book E-Book Central Library Available E-39665

The World of Metastability -- Clocks and Reset -- Handling Multiple Clocks -- Clock Dividers -- Low Power Design -- The Art of Pipelining -- Handling Endianess -- Debouncing Techniques -- Design Guidelines for EMC Performance -- References.

This book highlights the complex issues, tasks and skills that must be mastered by an IP designer, in order to design an optimized and robust digital circuit to solve a problem. The techniques and methodologies described can serve as a bridge between specifications that are known to the designer and RTL code that is final outcome, reducing significantly the time it takes to convert initial ideas and concepts into right-first-time silicon.� Coverage focuses on real problems rather than theoretical concepts, with an emphasis on design techniques across various aspects of chip-design.�� Describes techniques to help IP designers get it right the first time, creating designs optimized in terms of power, area and performance; Focuses on practical aspects of chip design and minimizes theory; Covers chip design in a consistent way, starting with basics and gradually developing advanced concepts, such as electromagnetic compatibility (EMC) design techniques and low-power design techniques such as dynamic voltage and frequency scaling (DVFS). Mohit Arora is a Senior Systems Engineer with Freescale Semiconductor. Since joining Freescale in 2005, his responsibilities have included developing systems and architecture requirements and leading the development of VoIP-based SOCs, as well as generic microcontroller SOCs.  As a systems engineer, he has been involved in product definition and writing specification, working on MCU/MPU-based products for the mid-high-end industrial and consumer market space. Prior to joining Freescale, he worked for Agilent Technologies, ST Microelectronics and DCM Technologies as a design engineer and lead, focused on printing ASICs, USB2.0 PHY, PCI-Express, Infiniband and Serial ATA protocols.   He earned a Bachelor's degree in Electronics and Communication Engineering from Netaji Subhas Institute of Technology (NSIT), India in 2000, has more than 30 publications in international magazine and holds a patent on serial links.

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