Variation-Aware Analog Structural Synthesis [electronic resource] / by Trent McConaghy, Pieter Palmers, Peng Gao, Michiel Steyaert, Georges Gielen.

Variation-Aware Sizing: Background -- Globally Reliable, Variation-Aware Sizing: Sangria -- Knowledge Extraction in Sizing: Caffeine -- Circuit Topology Synthesis: Background -- Trustworthy Topology Synthesis: MOJITO Search Space -- Trustworthy Topology Synthesis: MOJITO Algorithm -- Knowledge Extraction in Topology Synthesis -- Variation-Aware Topology Synthesis and Knowledge Extraction -- Novel Variation-Aware Topology Synthesis -- Conclusion.

Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techniques developed in this book generalize beyond analog CAD, to domains such as robotics, financial engineering, automotive design, and more. The tools are for: Globally-reliable variation-aware automated sizing via SANGRIA, leveraging structural homotopy and response surface modeling. Template-free symbolic models via CAFFEINE canonical form functions, for greater insight into the relationship between design/process variables and circuit performance/robustness. Topology selection and topology synthesis via MOJITO. 30 well-known analog building blocks are hierarchically combined, leading to >100,000 different possible topologies which are all trustworthy by construction. MOJITO does multi-objective genetic programming-based search across these topologies with SPICE accuracy, to return a set of sized topologies on the optimal performance/yield tradeoff curve. Nonlinear sensitivity analysis, topology decision trees, and analytical tradeoffs. With a data-mining perspective on Pareto-optimal topologies, this book shows how to do global nonlinear sensitivity analysis on topology and sizing variables, automatically extract a specs-to-topology decision tree, and determine analytical expressions of performance tradeoffs. Novel topology design. The MOJITO-N and ISCLEs tools generate novel yet trustworthy topologies; including boosting digitally-sized circuits for analog functionality.