000 03154nam a22004935i 4500
001 978-0-387-34600-7
003 DE-He213
005 20170628033309.0
007 cr nn 008mamaa
008 100301s2006 xxu| s |||| 0|eng d
020 _a9780387346007
_9978-0-387-34600-7
024 7 _a10.1007/0-387-34600-7
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aWang, Chao.
_eauthor.
245 1 0 _aAbstraction Refinement for Large Scale Model Checking
_h[electronic resource] /
_cby Chao Wang, Gary D. Hachtel, Fabio Somenzi.
264 1 _aBoston, MA :
_bSpringer US,
_c2006.
300 _aXIV, 179 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSeries on Integrated Circuits and Systems,
_x1558-9412
505 0 _aSymbolic Model Checking -- Abstraction -- Refinement -- Compositional SCC Analysis -- Disjunctive Decomposition -- Far Side Image Computation -- Refining SAT Decision Ordering -- Conclusions.
520 _aAbstraction Refinement for Large Scale Model Checking summarizes recent research on abstraction techniques for model checking large digital systems. Considering both the size of today's digital systems and the capacity of state-of-the-art verification algorithms, abstraction is the only viable solution for the successful application of model checking techniques to industrial-scale designs. This book describes recent research developments in automatic abstraction refinement techniques. The authors address the main challenge in abstraction refinement, i.e., the ability to efficiently reach or come close to the optimum abstraction (the smallest abstract model that proves or refutes the given property). A suite of fully automatic abstraction techniques are proposed to improve the overall computation efficiency. The suite of algorithms presented in this book has demonstrated significant improvement over the prior art; some of them have already been adopted by the EDA companies in their commercial/in-house verification tools. Abstraction Refinement for Large Scale Model Checking will be of interest to EDA researchers and tool developers, verification engineers, as well as people who are in the general areas of computer science and want to know the state-of-the-art of formal verification.
650 0 _aEngineering.
650 0 _aComputer aided design.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
650 2 4 _aElectronic and Computer Engineering.
700 1 _aHachtel, Gary D.
_eauthor.
700 1 _aSomenzi, Fabio.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9780387341552
830 0 _aSeries on Integrated Circuits and Systems,
_x1558-9412
856 4 0 _uhttp://dx.doi.org/10.1007/0-387-34600-7
912 _aZDB-2-ENG
999 _c14542
_d14542