000 03442nam a22004695i 4500
001 978-1-4020-6884-3
003 DE-He213
005 20170628033516.0
007 cr nn 008mamaa
008 100301s2008 ne | s |||| 0|eng d
020 _a9781402068843
_9978-1-4020-6884-3
024 7 _a10.1007/978-1-4020-6884-3
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aVeenstra, Hugo.
_eauthor.
245 1 0 _aCircuit and Interconnect Design for RF and High Bit-Rate Applications
_h[electronic resource] /
_cby Hugo Veenstra, John R. Long.
264 1 _aDordrecht :
_bSpringer Netherlands,
_c2008.
300 _aXII, 246 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aAnalog Circuits And Signal Processing Series
505 0 _aThe Challenge -- Interconnect Modelling, Analysis and Design -- Device Metrics -- Cross-Connect Switch Design -- Bias Circuits Tolerating Output Voltages Above BVCEO -- Design of Synchronous High-Speed CML Circuits, a PRBS Generator -- Analysis and Design of High-Frequency LC-VCOs.
520 _aRealizing maximum performance from high bit-rate and RF circuits requires close attention to IC technology, circuit-to-circuit interconnections (i.e., the ‘interconnect’) and circuit design. Circuit and Interconnect Design for RF and High Bit-rate Applications covers each of these topics from theory to practice, with sufficient detail to help you produce circuits that are ‘first-time right’. A thorough analysis of the interplay between on-chip circuits and interconnects is presented, including practical examples in high bit-rate and RF applications. Optimum interconnect geometries for the distribution of RF signals are described, together with simple models for standard interconnect geometries that capture characteristic impedance and propagation delay across a broad frequency range. The analyses also cover single-ended and differential geometries, so that the designer can incorporate the effects of interconnections as soon as estimated interconnect lengths are available. Application of interconnect design is illustrated using a 12.5 Gb/s crosspoint switch example taken from a volume production part. From the technology perspective, transistor performance and its relationship to design targets for high bit-rate and RF applications is extensively discussed. Traditional figures of merit, such as fT and fmax and their relevance to circuit design are discussed, and new figures of merit are introduced that are shown to be highly valuable for broadband circuit and oscillator design. In addition, an analysis of transistor operation at supply voltages above breakdown voltage BVCEO, is presented.
650 0 _aEngineering.
650 0 _aComputer science.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aProcessor Architectures.
700 1 _aLong, John R.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781402068829
830 0 _aAnalog Circuits And Signal Processing Series
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4020-6884-3
912 _aZDB-2-ENG
999 _c15509
_d15509